This invention generally relates to electronic systems and in particular to operational amplifier output stages.
Operational amplifiers are used in many electronic circuits to condition, manipulate and amplify signals. The operating characteristics of a particular operational amplifier are dependent upon its circuit topology. Generally, the operational amplifier consists of a number of stages, each containing internal sub-stages.
Two important operating characteristics of an operational amplifier are its amplification characteristics and its speed. High beta (xcex2) and high speed are desirable in operational amplifiers that have a variety of application, including DSL Drivers. Beta (xcex2) refers to the ratio of DC collector current to DC base current in a bipolar junction transistor or current gain from base to collector. xcex2 is very important parameter that varies with collector current and temperature.
The present invention achieves technical advantages as a high xcex2, high speed operational amplifier output stage using a localized feedback system in which current gains are close to xcex2n*xcex2p, where xcex2n refers to the beta of either the pre-driver npn transistor, output driver npn transistor or an average of both, depending on the current signal and xcex2p refers to the beta of either the pre-driver pnp transistor, output pnp transistor or an average of both. Where signal current is large and positive, load conduction is through the output npn transistor and pre-driver pnp transistor. Where signal current is large and negative, load conduction is through the pre-driver npn transistor and output pnp transistor. Where the signal is small, load conduction varies in tandem through the output npn transistor and pre-driver pnp transistor and the output pnp transistor and pre-driver npn transistor.
The output stage can be seen to comprise a pre-driver sub-stage and final sub-stage. The pre-driver sub-stage is further comprised of a first and a second pre-driver sub-stage circuit. In addition, the final sub-stage is further comprised of a first and a second final sub-stage circuit. The input to the present invention comprises a transconductance (xe2x80x9cgnxe2x80x9d) cell which, when a voltage is applied thereto, an error voltage appears across the input gm cell and an error current is produced at the output of the input gm cell. The error current (xcex4Iin) flows into the emitters of two pre-driver sub-stage transistors and flows out of their collectors into the bases of two other pre-driver transistors. Through this translinear loop, no net signal is lost. The gained up error currents then flow into the final sub-stage translinear loop, specifically, into the bases of two final sub-stage transistors. Effectively, in the small signal context, the first pre-driver sub-stage circuit amplifies a positive portion of the current signal for output to the first final sub-stage circuit while the second pre-driver sub-stage circuit amplifies a negative portion of the current signal for output to the second final sub-stage circuit. The first and second final sub-stages further amplify the positive portion and negative portion, respectively, of the current signal.
The first and second final sub-stage circuits are interconnected at an output terminal of the operational amplifier final stage such that the amplified positive portion of the signal and amplified negative portion of the signal are joined substantially in phase, in the form xcex4Io≈Bn*Bp*xcex4Iin. By feeding back a portion of the output signal using a variety of feedback principles, speed characteristics can be further improved.